Discussion:
[N8VEM-S100:7151] A New 16MB Static RAM S100 Bus Board
monahanz
10 years ago
Permalink
I would like to now introduce what will probably be the final version of
our very reliable S100 16MB Static RAM board.
It’s called the V5 16MB Static RAM S100 board. See here:-

*http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board*
<http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board>

(Bottom of the page).

This board has the following additional features:-

1. I did not want to change the basic RAM board circuit. It has proven
itself time and again to be very reliable with any CPU board I could throw
at it. Common easy to obtain 74LSxx chips are used throughout.
2. I wanted to hand lay down broad power traces to all the boards IC’s
for more even power distribution.
3. I have inserted a trace “Keep out Area” on the front of the board so
there is no danger of the 5V and 3.3V regulator heat sinks touching a
critical trace beneath.
4. I added two 22V10 GALs to replace a number of 74LSxx chips. This
greatly simplifies the board and somewhat speeds up the RAM access times.
I realize not everybody is familiar with GAL’s. For those people who
cannot program GALs and beginners ,I will supply the pre-programmed
Lattice 22V10 GALs. The PALASM code is provided on the web page. These
GAL’s are fairly common (Jameco #39159 for the 15ns variety).
5. I have added a wait state circuit (0 - 8 I/O wait states) to
accommodate very fast S100 boards such as our 80386 and 80486 boards.
6. People should be able to simply switch IC’s from the old board to
this new one. Two new GAL ICs is the only major change.
7. While the board is really built to meet the 16MB addressing range of
the IEEE-696 bus, I have added jumper options so the board can be used in
older systems like an Altair or IMSAI which only use a 16 bit address bus.
Altair/IMASAI RAM write protect/unprotect can also be implemented on
this board.
8. The board can accommodate EITHER the dual Mezzanine RAM boards
described above (V6.0c), for 16MB of static RAM, or 8MB by soldering
the 4 SMD CY62167DV30 static RAM chips directly on the board or 16M, by
soldering 4 of the newer SMD AS6C3216 (4M X 8bit) static RAM chips on
the board.
9. Last but least, I relabeled much of the Silk Screen to be more
relevant. For example placing IC numbers above their pin locations etc.




Anyway I will do a group order for a batch of these V5 bare boards.
Please let me know ASAP if you would like one or more bare boards. They
will run somewhere between $14 - $16 each + shipping.

It’s best to send me an e-mail direct (monahan AT vitasoft DOT org).
John
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Gary Kaufman
10 years ago
Permalink
John -

Two please for me, thanks!

- Gary
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Fabio Battaglia
10 years ago
Permalink
John, the usual 3x boards for me.
Thank you!

Fabio Battaglia
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Ian McLaughlin
10 years ago
Permalink
John,

One board for me please.

Ian
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yoda
10 years ago
Permalink
Hi John

I am good for 2 boards

Thanks

Dave
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Matthew Turner
10 years ago
Permalink
Please put me down for two boards as well.



Matt Turner




Date: Sun, 31 May 2015 13:53:48 -0700
From: ***@vitasoft.org
To: n8vem-***@googlegroups.com
Subject: [N8VEM-S100:7151] A New 16MB Static RAM S100 Bus Board



I would like to now introduce what will probably be the final version of our very reliable S100 16MB Static RAM board.
It’s called the V5 16MB Static RAM S100 board. See here:-
http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board

(Bottom of the page).

This board has the following additional features:-



I did not want to change the basic RAM board circuit. It has proven itself time and again to be very reliable with any CPU board I could throw at it. Common easy to obtain 74LSxx chips are used throughout.

I wanted to hand lay down broad power traces to all the boards IC’s for more even power distribution.

I have inserted a trace “Keep out Area” on the front of the board so there is no danger of the 5V and 3.3V regulator heat sinks touching a critical trace beneath.

I added two 22V10 GALs to replace a number of 74LSxx chips. This greatly simplifies the board and somewhat speeds up the RAM access times. I realize not everybody is familiar with GAL’s. For those people who cannot program GALs and beginners ,I will supply the pre-programmed Lattice 22V10 GALs. The PALASM code is provided on the web page. These GAL’s are fairly common (Jameco #39159 for the 15ns variety).

I have added a wait state circuit (0 - 8 I/O wait states) to accommodate very fast S100 boards such as our 80386 and 80486 boards.

People should be able to simply switch IC’s from the old board to this new one. Two new GAL ICs is the only major change.

While the board is really built to meet the 16MB addressing range of the IEEE-696 bus, I have added jumper options so the board can be used in older systems like an Altair or IMSAI which only use a 16 bit address bus. Altair/IMASAI RAM write protect/unprotect can also be implemented on this board.

The board can accommodate EITHER the dual Mezzanine RAM boards described above (V6.0c), for 16MB of static RAM, or 8MB by soldering the 4 SMD CY62167DV30 static RAM chips directly on the board or 16M, by soldering 4 of the newer SMD AS6C3216 (4M X 8bit) static RAM chips on the board.

Last but least, I relabeled much of the Silk Screen to be more relevant. For example placing IC numbers above their pin locations etc.


Anyway I will do a group order for a batch of these V5 bare boards. Please let me know ASAP if you would like one or more bare boards. They will run somewhere between $14 - $16 each + shipping.

It’s best to send me an e-mail direct (monahan AT vitasoft DOT org).

John
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John Parsons
10 years ago
Permalink
I would like to have 3 boards, please!
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Brian Marstella
10 years ago
Permalink
Hi, John,

Thanks for organizing this; I'm in for 1 as well.

Regards, Brian.
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Andrew Bingham
10 years ago
Permalink
I'm in for 1 board.
...
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Robert
10 years ago
Permalink
<HEAD>
<STYLE>body{font-family: Geneva,Arial,Helvetica,sans-serif;font-size:9pt;background-color: #ffffff;color: black;}</STYLE>

<META name=GENERATOR content="MSHTML 11.00.9600.17801"></HEAD>
<BODY id=compText>
<P>Hi John,</P>
<P>Please put me down for 1ea. New 16MB Static RAM S100 Bus Board.</P>
<P>Thank you,</P>
<P>Robert Greenstreet</P>
<P><BR><BR>&nbsp;</P>
<BLOCKQUOTE style="FONT-SIZE: 10pt; TEXT-DECORATION: none; FONT-FAMILY: arial,sans-serif; FONT-WEIGHT: normal; COLOR: black; FONT-STYLE: normal; PADDING-LEFT: 5px; MARGIN-LEFT: 0px; BORDER-LEFT: #0000ff 2px solid">-----Original Message----- <BR>From: monahanz <***@VITASOFT.ORG><BR>Sent: May 31, 2015 3:53 PM <BR>To: n8vem-***@googlegroups.com <BR>Subject: [N8VEM-S100:7151] A New 16MB Static RAM S100 Bus Board <BR><BR>
<DIV dir=ltr><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>I would like to now introduce what will probably be the final version of our very reliable S100 16MB Static RAM board.&nbsp; </FONT></DIV>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>It’s called the V5 16MB Static RAM S100 board.&nbsp; See here:-</FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<P style="MARGIN: 0in 0in 10pt"><A href="http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board" target=_blank><U><FONT color=#0000ff size=3 face=Calibri>http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board</FONT></U></A></P><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<P style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>(Bottom of the page).</FONT></P><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<P style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>This board has the following additional features:-</FONT></P><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<OL>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>I did not want to change the basic RAM board circuit. It has proven itself time and again to be very reliable with any CPU board I could throw at it. Common easy to obtain 74LSxx chips are used throughout. </FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT face=Calibri><FONT size=3><FONT color=#000000>I wanted to hand lay down broad power traces to all the boards IC’s for more even power distribution. </FONT></FONT></FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>I have inserted a trace “Keep out Area” on the front of the board so there is no danger of the 5V and 3.3V regulator heat sinks touching a critical trace beneath.</FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT face=Calibri><FONT size=3><FONT color=#000000><SPAN style="mso-spacerun: yes">&nbsp;</SPAN>I added two 22V10 GALs to replace a number of 74LSxx chips.<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>This greatly simplifies the board and somewhat speeds up the RAM access times.<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>I realize not everybody is familiar with GAL’s. <SPAN style="mso-spacerun: yes">&nbsp;</SPAN>For those people who cannot program GALs <SPAN style="mso-spacerun: yes">&nbsp;</SPAN>and beginners ,I will supply the pre-programmed Lattice 22V10 GALs. The PALASM code is provided on the web page.<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>These GAL’s are fairly common (Jameco #39159 for the 15ns variety).<SPAN style="mso-spacerun: yes">&nbsp;&nbsp; </SPAN></FONT></FONT></FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT face=Calibri><FONT size=3><FONT color=#000000><SPAN style="mso-spacerun: yes">&nbsp;</SPAN>I have added a wait state circuit (0 - 8 I/O wait states) to accommodate very fast S100 boards such as our 80386 and 80486 boards. </FONT></FONT></FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT face=Calibri><FONT size=3><FONT color=#000000><SPAN style="mso-spacerun: yes">&nbsp;</SPAN>People should be able to simply switch IC’s from the old board to this new one. Two new GAL ICs is the only major change.<SPAN style="mso-spacerun: yes">&nbsp; </SPAN></FONT></FONT></FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>While the board is really built to meet the 16MB addressing range of the IEEE-696 bus, I have added jumper options so the board can be used in older systems like an Altair or IMSAI which only use a 16 bit address bus.<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>Altair/IMASAI RAM write protect/unprotect can also be implemented on this board.</FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>The board can accommodate EITHER the dual Mezzanine RAM boards described above (V6.0c),<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>for 16MB of static RAM, or 8MB by soldering the 4 SMD<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>CY62167DV30 static RAM chips directly on the board or 16M, by soldering 4 of the newer SMD<SPAN style="mso-spacerun: yes">&nbsp; </SPAN>AS6C3216 (4M X 8bit) static RAM chips on the board.</FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<LI>
<DIV style="MARGIN: 0in 0in 10pt"><FONT face=Calibri><FONT size=3><FONT color=#000000><SPAN style="mso-spacerun: yes">&nbsp;</SPAN>Last but least, I relabeled much of the Silk Screen to be more relevant. For example placing IC numbers above their pin locations etc.<SPAN style="mso-spacerun: yes">&nbsp;&nbsp;&nbsp; </SPAN></FONT></FONT></FONT></DIV></LI></OL><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<P style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri></FONT>&nbsp;</P><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<P style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>Anyway I will do a group order for a batch of these V5 bare boards.&nbsp; &nbsp;&nbsp;Please let me know ASAP if you would like one or more bare boards. They will run somewhere between $14 - $16 each + shipping. &nbsp;</FONT></P><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<P style="MARGIN: 0in 0in 10pt"><FONT face=Calibri><FONT size=3><FONT color=#000000><SPAN style="mso-spacerun: yes">&nbsp;</SPAN>It’s best to send me an e-mail direct (monahan AT vitasoft DOT org).</FONT></FONT></FONT></P><FONT color=#000000 size=3 face="Times New Roman"></FONT>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri>&nbsp;John </FONT></DIV>
<DIV style="MARGIN: 0in 0in 10pt"><FONT color=#000000 size=3 face=Calibri><BR></FONT></DIV><FONT color=#000000 size=3 face="Times New Roman"></FONT></DIV>
<P></P>-- <BR>You received this message because you are subscribed to the Google Groups "N8VEM-S100" group.<BR>To unsubscribe from this group and stop receiving emails from it, send an email to <A href="mailto:n8vem-s100+***@googlegroups.com" target=_blank>n8vem-s100+***@googlegroups.com</A>.<BR>For more options, visit <A href="https://groups.google.com/d/optout" target=_blank>https://groups.google.com/d/optout</A>.<BR></BLOCKQUOTE></BODY>

<p></p>

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Gary Kaufman
10 years ago
Permalink
John -

I've had requests to program GAL's for this board - are the .jed files at
the bottom of the page ready for distribution?

- Gary
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John Monahan
10 years ago
Permalink
Gary, please see my previous e-mail

John





From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com] On Behalf Of Gary Kaufman
Sent: Wednesday, June 3, 2015 8:36 PM
To: n8vem-***@googlegroups.com
Subject: [N8VEM-S100:7174] Re: A New 16MB Static RAM S100 Bus Board



John -

I've had requests to program GAL's for this board - are the .jed files at the bottom of the page ready for distribution?

- Gary

On Sunday, May 31, 2015 at 4:53:49 PM UTC-4, monahanz wrote:

I would like to now introduce what will probably be the final version of our very reliable S100 16MB Static RAM board.

It’s called the V5 16MB Static RAM S100 board. See here:-

<http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board> http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board

(Bottom of the page).

This board has the following additional features:-

1. I did not want to change the basic RAM board circuit. It has proven itself time and again to be very reliable with any CPU board I could throw at it. Common easy to obtain 74LSxx chips are used throughout.

2. I wanted to hand lay down broad power traces to all the boards IC’s for more even power distribution.

3. I have inserted a trace “Keep out Area” on the front of the board so there is no danger of the 5V and 3.3V regulator heat sinks touching a critical trace beneath.

4. I added two 22V10 GALs to replace a number of 74LSxx chips. This greatly simplifies the board and somewhat speeds up the RAM access times. I realize not everybody is familiar with GAL’s. For those people who cannot program GALs and beginners ,I will supply the pre-programmed Lattice 22V10 GALs. The PALASM code is provided on the web page. These GAL’s are fairly common (Jameco #39159 for the 15ns variety).

5. I have added a wait state circuit (0 - 8 I/O wait states) to accommodate very fast S100 boards such as our 80386 and 80486 boards.

6. People should be able to simply switch IC’s from the old board to this new one. Two new GAL ICs is the only major change.

7. While the board is really built to meet the 16MB addressing range of the IEEE-696 bus, I have added jumper options so the board can be used in older systems like an Altair or IMSAI which only use a 16 bit address bus. Altair/IMASAI RAM write protect/unprotect can also be implemented on this board.

8. The board can accommodate EITHER the dual Mezzanine RAM boards described above (V6.0c), for 16MB of static RAM, or 8MB by soldering the 4 SMD CY62167DV30 static RAM chips directly on the board or 16M, by soldering 4 of the newer SMD AS6C3216 (4M X 8bit) static RAM chips on the board.

9. Last but least, I relabeled much of the Silk Screen to be more relevant. For example placing IC numbers above their pin locations etc.



Anyway I will do a group order for a batch of these V5 bare boards. Please let me know ASAP if you would like one or more bare boards. They will run somewhere between $14 - $16 each + shipping.

It’s best to send me an e-mail direct (monahan AT vitasoft DOT org).

John
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'Rick' via N8VEM-S100
10 years ago
Permalink
John,

Please reserve 2 RAM boards for me.

Thanks,
Rick Bromagem


From: monahanz
Sent: Sunday, May 31, 2015 1:53 PM
To: n8vem-***@googlegroups.com
Subject: [N8VEM-S100:7151] A New 16MB Static RAM S100 Bus Board

I would like to now introduce what will probably be the final version of our very reliable S100 16MB Static RAM board.
It’s called the V5 16MB Static RAM S100 board. See here:-
http://s100computers.com/My%20System%20Pages/16M%20RAM%20Board/16MG%20RAM%20Board.htm#A_Third_Prototype_16MB_Static_RAM_Board

(Bottom of the page).

This board has the following additional features:-

1.. I did not want to change the basic RAM board circuit. It has proven itself time and again to be very reliable with any CPU board I could throw at it. Common easy to obtain 74LSxx chips are used throughout.
2.. I wanted to hand lay down broad power traces to all the boards IC’s for more even power distribution.
3.. I have inserted a trace “Keep out Area” on the front of the board so there is no danger of the 5V and 3.3V regulator heat sinks touching a critical trace beneath.
4.. I added two 22V10 GALs to replace a number of 74LSxx chips. This greatly simplifies the board and somewhat speeds up the RAM access times. I realize not everybody is familiar with GAL’s. For those people who cannot program GALs and beginners ,I will supply the pre-programmed Lattice 22V10 GALs. The PALASM code is provided on the web page. These GAL’s are fairly common (Jameco #39159 for the 15ns variety).
5.. I have added a wait state circuit (0 - 8 I/O wait states) to accommodate very fast S100 boards such as our 80386 and 80486 boards.
6.. People should be able to simply switch IC’s from the old board to this new one. Two new GAL ICs is the only major change.
7.. While the board is really built to meet the 16MB addressing range of the IEEE-696 bus, I have added jumper options so the board can be used in older systems like an Altair or IMSAI which only use a 16 bit address bus. Altair/IMASAI RAM write protect/unprotect can also be implemented on this board.
8.. The board can accommodate EITHER the dual Mezzanine RAM boards described above (V6.0c), for 16MB of static RAM, or 8MB by soldering the 4 SMD CY62167DV30 static RAM chips directly on the board or 16M, by soldering 4 of the newer SMD AS6C3216 (4M X 8bit) static RAM chips on the board.
9.. Last but least, I relabeled much of the Silk Screen to be more relevant. For example placing IC numbers above their pin locations etc.


Anyway I will do a group order for a batch of these V5 bare boards. Please let me know ASAP if you would like one or more bare boards. They will run somewhere between $14 - $16 each + shipping.

It’s best to send me an e-mail direct (monahan AT vitasoft DOT org).

John
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