[N8VEM-S100:7324] V3 Dual IDE/CF S100 Bus board initial checks

[Jeff Albrecht]

I'm checking in with a progress report and to say thank you John for the
board and the mailing to all of us. And thank you Gary for burning the GALs
and mailing them to me.

This v.3 is my first experience with the IDE/CF board. I've installed all
the non socketed parts, verified voltages and then the two GALs. Rather
than use my front panel or non existent monitor board (except a CCS Z80 CPU
more on that later) I assembled and ran this small program on a stock
(except the disk I/O) Altair 8800b to exercise the ports.

; jha 6/27/2015 testport.asm
; test the S-100 IDE v.3 port addressing
;
0100 org 0100h
0100 DB30 loop: in 030h
0102 C30001 jmp loop
0105 end

Before I run the program I clip on the logic analyzer of my S-100/N8VEM
extender to pin 23 of GAL 1 ADDR_8255* it's HIGH. I run the program and I
get a couple visible cycles/pulses then the HIGH and LOW lines are cycling
so quickly I can't see them cycle anymore. The LOHI and HILO transition
leds are on too. <pause> May as well put a scope on it. I've got a pulse
width 480ns at 100khz. I'm not seeing it on the 8255 pin 6 CS*

Looks good right? I'm a bit curious about the initial ?settling? time when
I first start the test program. I'll move on to some of the other tests I
see in the v.2 notes.

Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California
Computer Systems (CCS) 2810 Z80 CPU?

Does anyone have a system generated for a CCS 2810CPU, CCS 2422 floppy
controller and the IDE/CF card?

- jeffa KF7CRU @jhalbrecht / @TheRetroWagon

[Bob Bell]

Hi, JeffA



Back when I first built my IDE/CF v2 board last summer, I had it running with the application program I downloaded that went along with it. Maybe that was the MYIDE program, I cannot remember for sure. But whatever it was, it did run properly on my CCS 2810 CPU board with a CCS 2422 in the cage as well. The problem I had was I could not get it to run as a BIOS driver CP/M 2.2. I don’t believe it was hardware related. I think I was just having difficulties writing the driver for it in my much-modified CCS CBIOS, which has built in Blocking/De-blocking for disks larger than 128 B/s. So after reading up on CP/M 3 I discovered that CP/M 3 has blocking/de-blocking built into the BDOS, making drivers for different disk controllers easier to handle. So I decided to get a CP/M 3 system running, then work on getting the IDE/CF board functioning for it. That decision has spawned a plethora of related projects, including a whole new S-100 computer just for debugging hardware and software, and a new 8-bit memory card with more than 64K and with a MMU to support Banked CP/M 3. This board also has what I am hoping will be everything I could ever need in a hardware debugger. (See my posting about a week ago about the new version 2 of the Mem8Plus for details. Status: I just finished simulating the last of the 12 GALs on this board and am just starting power estimates and power supply design.)



I hope this helps answer your question.



Bob Bell





From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com] On Behalf Of Jeff Albrecht
Sent: Saturday, June 27, 2015 5:11 PM
To: n8vem-***@googlegroups.com
Subject: [N8VEM-S100:7324] V3 Dual IDE/CF S100 Bus board initial checks



I'm checking in with a progress report and to say thank you John for the board and the mailing to all of us. And thank you Gary for burning the GALs and mailing them to me.



This v.3 is my first experience with the IDE/CF board. I've installed all the non socketed parts, verified voltages and then the two GALs. Rather than use my front panel or non existent monitor board (except a CCS Z80 CPU more on that later) I assembled and ran this small program on a stock (except the disk I/O) Altair 8800b to exercise the ports.



; jha 6/27/2015 testport.asm
; test the S-100 IDE v.3 port addressing
;
0100 org 0100h
0100 DB30 loop: in 030h
0102 C30001 jmp loop
0105 end



Before I run the program I clip on the logic analyzer of my S-100/N8VEM extender to pin 23 of GAL 1 ADDR_8255* it's HIGH. I run the program and I get a couple visible cycles/pulses then the HIGH and LOW lines are cycling so quickly I can't see them cycle anymore. The LOHI and HILO transition leds are on too. <pause> May as well put a scope on it. I've got a pulse width 480ns at 100khz. I'm not seeing it on the 8255 pin 6 CS*



Looks good right? I'm a bit curious about the initial ?settling? time when I first start the test program. I'll move on to some of the other tests I see in the v.2 notes.



Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California Computer Systems (CCS) 2810 Z80 CPU?



Does anyone have a system generated for a CCS 2810CPU, CCS 2422 floppy controller and the IDE/CF card?



- jeffa KF7CRU @jhalbrecht / @TheRetroWagon

[Jeff Albrecht]

Had some time to work with my v.3 IDE/CF card today after completing
assembly.

My first experiments were using Josh's JAIR board. However I believe the
JAIR uses, by default, I/O ports at 030h which is where my GAL was burnt
for me by Gary. I get the signon message and initializing then locks up.

I have a CompuPro system running 8" FDDs with an 8085 / 88 card. Same
results hangs after signon / initializing message. Interestingly SURVEY.COM
locks up on the CompuPro after not displaying port 030h that I believe the
IDE/CF is configured for. Note test I ran at beginning of this thread seems
to indicate GAL is responding to port 030h.

I did install the 1k pullup R118. For U110 I used DM74S04N. I tried with
reset empty and on the right most two pins.

Any suggestions for some further debugging?

*Questions*

- Can MYIDE.COM run on an 8080 or 8085 CPU?

- Can MYIDE.COM run under cp/m 2.2? cp/m3 NOT required for MYIDE.COM test /
utility program?

<Loading Image...>


- jeffa

Post by Jeff Albrecht
I'm checking in with a progress report and to say thank you John for the
board and the mailing to all of us. And thank you Gary for burning the GALs
and mailing them to me.
This v.3 is my first experience with the IDE/CF board. I've installed all
the non socketed parts, verified voltages and then the two GALs. Rather
than use my front panel or non existent monitor board (except a CCS Z80 CPU
more on that later) I assembled and ran this small program on a stock
(except the disk I/O) Altair 8800b to exercise the ports.
; jha 6/27/2015 testport.asm
; test the S-100 IDE v.3 port addressing
;
0100 org 0100h
0100 DB30 loop: in 030h
0102 C30001 jmp loop
0105 end
Before I run the program I clip on the logic analyzer of my S-100/N8VEM
extender to pin 23 of GAL 1 ADDR_8255* it's HIGH. I run the program and I
get a couple visible cycles/pulses then the HIGH and LOW lines are cycling
so quickly I can't see them cycle anymore. The LOHI and HILO transition
leds are on too. <pause> May as well put a scope on it. I've got a pulse
width 480ns at 100khz. I'm not seeing it on the 8255 pin 6 CS*
Looks good right? I'm a bit curious about the initial ?settling? time when
I first start the test program. I'll move on to some of the other tests I
see in the v.2 notes.
Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California
Computer Systems (CCS) 2810 Z80 CPU?
Does anyone have a system generated for a CCS 2810CPU, CCS 2422 floppy
controller and the IDE/CF card?

[John Monahan]

MYIDE will not run on 8080/8085. On 2.2 It should be OK I think, if not only minor console I/O mods required.

John





From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com] On Behalf Of Jeff Albrecht
Sent: Monday, July 13, 2015 6:41 PM
To: n8vem-***@googlegroups.com
Subject: [N8VEM-S100:7393] Re: V3 Dual IDE/CF S100 Bus board initial checks



Had some time to work with my v.3 IDE/CF card today after completing assembly.



My first experiments were using Josh's JAIR board. However I believe the JAIR uses, by default, I/O ports at 030h which is where my GAL was burnt for me by Gary. I get the signon message and initializing then locks up.



I have a CompuPro system running 8" FDDs with an 8085 / 88 card. Same results hangs after signon / initializing message. Interestingly SURVEY.COM locks up on the CompuPro after not displaying port 030h that I believe the IDE/CF is configured for. Note test I ran at beginning of this thread seems to indicate GAL is responding to port 030h.



I did install the 1k pullup R118. For U110 I used DM74S04N. I tried with reset empty and on the right most two pins.



Any suggestions for some further debugging?



Questions



- Can MYIDE.COM run on an 8080 or 8085 CPU?



- Can MYIDE.COM run under cp/m 2.2? cp/m3 NOT required for MYIDE.COM test / utility program?



<https://lh3.googleusercontent.com/-A_NxunGsMqg/VaRocqaw95I/AAAAAAAABAw/oAydIEossQU/s1600/S-100%2BIDE%2BCF%2Bv.3.png>





- jeffa





On Saturday, June 27, 2015 at 2:10:53 PM UTC-7, Jeff Albrecht wrote:

I'm checking in with a progress report and to say thank you John for the board and the mailing to all of us. And thank you Gary for burning the GALs and mailing them to me.



This v.3 is my first experience with the IDE/CF board. I've installed all the non socketed parts, verified voltages and then the two GALs. Rather than use my front panel or non existent monitor board (except a CCS Z80 CPU more on that later) I assembled and ran this small program on a stock (except the disk I/O) Altair 8800b to exercise the ports.



; jha 6/27/2015 testport.asm
; test the S-100 IDE v.3 port addressing
;
0100 org 0100h
0100 DB30 loop: in 030h
0102 C30001 jmp loop
0105 end



Before I run the program I clip on the logic analyzer of my S-100/N8VEM extender to pin 23 of GAL 1 ADDR_8255* it's HIGH. I run the program and I get a couple visible cycles/pulses then the HIGH and LOW lines are cycling so quickly I can't see them cycle anymore. The LOHI and HILO transition leds are on too. <pause> May as well put a scope on it. I've got a pulse width 480ns at 100khz. I'm not seeing it on the 8255 pin 6 CS*



Looks good right? I'm a bit curious about the initial ?settling? time when I first start the test program. I'll move on to some of the other tests I see in the v.2 notes.



Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California Computer Systems (CCS) 2810 Z80 CPU?



Does anyone have a system generated for a CCS 2810CPU, CCS 2422 floppy controller and the IDE/CF card?



- jeffa KF7CRU @jhalbrecht / @TheRetroWagon

[Jeff Albrecht]

Swapped in a CompuPro CPUZ. Got a bit further.

Copyright (C) Digital Research, (C) CompuPro, and (C) G & G Engineering
64K CP/M 2.2LD20

A>myide

IDE Disk Drive Test Program 3/28/2012 (V2.9) (Using CPM3 BIOS Routines)

CPM Track,Sectors --> LBA mode
Initilizing IDE Board, one moment please...
Initilizing of First Drive failed. Aborting Program.

A>

*Questions:*

- I don't suppose there is a compile option to force 8080/8085 code from
z80 source? Just curious might like to use the IDE/CF with some Imsai /
Altair computers.

- jeffa

[Jeff Albrecht]

Post by John Monahan
MYIDE will not run on 8080/8085. On 2.2 It should be OK I think, if not
only minor console I/O mods required.
John

John,

I saw this in the history/notes of the myide.asm source code.

; V1.7 3/1/2010 ;REMOVED Z80 CODE (SO IT CAN BE TRANSLATED
TO 8086 CODE LATER)

And later in the same .asm source

; INCLUDE Z-80 MACRO LIBRARY:
MACLIB Z80 ;FOR THE Z80 DJNZ OPCODE

Which is what led me to believe the code was not Z80 specific. Can someone
save me some RTFM and explain those two lines? (Both the commented and
uncommented lines.)

[norwestrzh via N8VEM-S100]

Hi Jeff --

Post by John Monahan
Had some time to work with my v.3 IDE/CF card today after completing assembly.

I've assembled one of mine. Can't get it to work either. Can't write to the 8255 ports, but I can read from them. That's a complete wipe-out for me. Couldn't get V1, V2 or V3 to work.

Post by John Monahan
- Can MYIDE.COM run on an 8080 or 8085 CPU?

Don't know.

Post by John Monahan
- Can MYIDE.COM run under cp/m 2.2? cp/m3 NOT required for MYIDE.COM test / utility program?

Sure. I've been using the single CF version of MYIDE on cp/m 2.2. I've got the source for it in (cleaner) Z80 assembler, if that would help? But *NOT* the dual CF version. Haven't tried to work with that yet.

Post by John Monahan
Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California Computer Systems (CCS) 2810 Z80 CPU?

I have a CCS 2810 (actually two), but I've not tried it with that CPU. I'm running it on a CompuPro CPU-Z (@ 4MHz).

Roger

[John Monahan]

Those IDE boards are in fact a very simple boards. Essentially you are just talking to a 8255 three port chip. If you cannot write, you need to determine where the log jam is. Using a simple logic probe determine if the chip CS* lines is going low with a write. If WR* is going low etc. Single step through a simple continuous write loop in RAM. Eg:-



Start: LD A, 33

OUT PORT_8255, A

JMP START



Follow the signals.

Change ports, repeat.

Switch to reading ports, same thing




If you have a digital logic probe look at data lines, triggered with each read/write.

By now there are well over 100 of these boards out there. It must be some glitch in your system

Good luck

John









From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com]
Sent: Tuesday, July 14, 2015 9:04 AM
To: n8vem-***@googlegroups.com
Subject: Re: [N8VEM-S100:7397] Re: V3 Dual IDE/CF S100 Bus board initial checks



Hi Jeff --

Post by John Monahan
Had some time to work with my v.3 IDE/CF card today after completing assembly.

I've assembled one of mine. Can't get it to work either. Can't write to the 8255 ports, but I can read from them. That's a complete wipe-out for me. Couldn't get V1, V2 or V3 to work.

Post by John Monahan
- Can MYIDE.COM run on an 8080 or 8085 CPU?

Don't know.

Post by John Monahan
- Can MYIDE.COM run under cp/m 2.2? cp/m3 NOT required for MYIDE.COM test / utility program?

Sure. I've been using the single CF version of MYIDE on cp/m 2.2. I've got the source for it in (cleaner) Z80 assembler, if that would help? But *NOT* the dual CF version. Haven't tried to work with that yet.

Post by John Monahan
Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California Computer Systems (CCS) 2810 Z80 CPU?

I have a CCS 2810 (actually two), but I've not tried it with that CPU. I'm running it on a CompuPro CPU-Z (@ 4MHz).

Roger

[Jeff Albrecht]

Post by John Monahan
Those IDE boards are in fact a very simple boards. Essentially you are
just talking to a 8255 three port chip. If you cannot write, you need to
determine where the log jam is. Using a simple logic probe determine if
the chip CS* lines is going low with a write. If WR* is going low etc.
Single step through a simple continuous write loop in RAM. Eg:-

These three screen captures are from my Owon DS7102V connected to pin 23 of
GAL 1. The test computer is a IDE/CF v3 card in a CCS Z80 running it's ROM
monitor. Similar results were obtained from A CompuPro ZPU running DDT
under CP/M. I don't specifically remember seeing the ?glitches? when I ran
this simple test on an Altair when I began this theread.

The first image is at idle. The second detail of the ?glitch/spike? at idle
(the test program not running). And the third while running this simple
program:

0100 org 0100h
0100 DB30 loop: in 030h
0102 C30001 jmp loop
0105 end




<https://lh3.googleusercontent.com/-GS3lZjt2T0s/VaWg5jSqWQI/AAAAAAAABBM/ZtPi7OcWk2Q/s1600/20130915_354816.bmp>

<https://lh3.googleusercontent.com/-EkTsxWM9FNo/VaWhEg8M-II/AAAAAAAABBU/r4j0t4f7kfw/s1600/20130915_354750.bmp>

<https://lh3.googleusercontent.com/-AfeMsWGfOyE/VaWhM2_sJyI/AAAAAAAABBc/AdIr9uadyMM/s1600/20130915_354425.bmp>


The 3rd image of the waveform while the test program is running seems
reasonable. True? What about those first two images when the test program
was not running? Are they of concern?

[Jeff Albrecht]

Post by Jeff Albrecht

Post by John Monahan
Those IDE boards are in fact a very simple boards. Essentially you are
just talking to a 8255 three port chip. If you cannot write, you need to
determine where the log jam is. Using a simple logic probe determine if
the chip CS* lines is going low with a write. If WR* is going low etc.
Single step through a simple continuous write loop in RAM. Eg:-

These three screen captures are from my Owon DS7102V connected to pin 23
of GAL 1. The test computer is a IDE/CF v3 card in a CCS Z80 running it's
ROM monitor. Similar results were obtained from A CompuPro ZPU running DDT
under CP/M. I don't specifically remember seeing the ?glitches? when I ran
this simple test on an Altair when I began this theread.

I guess that ?glitch? is not to worry. I seem to have a clean CS on pin 6
of the 8255 with the test loop running with IN or OUTs in the loop.

[Bob Bell]

At one point you mention a MYIDE ROM. I’m not familiar with that.



MYIDE, the .COM file, runs in CPM 2.2 on my CCS 2810 with a V2 IDE/CF card that I had to modify somewhat to get it to work.

(If you are really in need of knowing what the modifications were, I could dig them up, but it might take some time
)

However, I could not get drivers to run in my BIOS in order to use it through the file system.

This was my motivation nearly a year ago to get a CPM3 system running (and have an easier go with the drivers.) And the rest a is a very long story that still has no end!

I have a V3 IDE/CF card sitting here to build, hoping that the combination of V3 and CPM3 will be a winner, cause my 8” disks are getting real old.

I also have a CCS 2422 floppy controller with three 8” and one 5 Œ” drives, and a dual console setup consisting of a Fulcrum IVI S-100 card and a serial terminal on the 2810’s serial port.



Bob Bell





From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com]
Sent: Tuesday, July 14, 2015 12:04 PM
To: n8vem-***@googlegroups.com
Subject: Re: [N8VEM-S100:7397] Re: V3 Dual IDE/CF S100 Bus board initial checks



Hi Jeff --

Post by John Monahan
Had some time to work with my v.3 IDE/CF card today after completing assembly.

I've assembled one of mine. Can't get it to work either. Can't write to the 8255 ports, but I can read from them. That's a complete wipe-out for me. Couldn't get V1, V2 or V3 to work.

Post by John Monahan
- Can MYIDE.COM run on an 8080 or 8085 CPU?

Don't know.

Post by John Monahan
- Can MYIDE.COM run under cp/m 2.2? cp/m3 NOT required for MYIDE.COM test / utility program?

Sure. I've been using the single CF version of MYIDE on cp/m 2.2. I've got the source for it in (cleaner) Z80 assembler, if that would help? But *NOT* the dual CF version. Haven't tried to work with that yet.

Post by John Monahan
Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California Computer Systems (CCS) 2810 Z80 CPU?

I have a CCS 2810 (actually two), but I've not tried it with that CPU. I'm running it on a CompuPro CPU-Z (@ 4MHz).

Roger

[Jeff Albrecht]

Post by Bob Bell
At one point you mention a MYIDE ROM. I’m not familiar with that.

Bob,

My assumption is that the myide.asm program has equates to user either cp/m
bdos calls for I/O or you can configure for direct I/O to your hardware
allowing you to ORG at a location suitable for ROM.

FFFF = CPM EQU TRUE ;TRUE IF OUTPUT VIA CPM,
FALSE IF DIRECT TO HARDWARE

From the S100computers.com IDE/CF card docs

The next issue is how are you going to communicate with the

Post by Bob Bell
keyboard/CRT/LCD display. If the equate for CPM=TRUE, communications will
be via standard CPM/BDOS calls. However in cases where you do not yet have
CPM up and running, if the CPM equate is set to FALSE, output will go to
directly your console ports. These need to be set to their correct values.
The code is very simple and straightforward. Its menu driven.

[norwestrzh via N8VEM-S100]

Hi John,

Post by John Monahan
Those IDE boards are in fact a very simple boards.

I agree! On paper, at least. But all the chatter I've seen here w.r.t. the flavor of 8255, mods. to the boards, and subs. for some of the standard LS logic, leads me to believe that they are not all that straightforward.

Post by John Monahan
Using a simple logic probe determine if the chip CS* lines is going low with a write.

It is.

Post by John Monahan
If WR* is going low etc.

It is. Everything looks OK (with a simple logic probe), but I can't see these signals in relationship to each other (no digital logic analyzer).

Post by John Monahan
Single step through a simple continuous write loop in RAM. Eg:-

Yep, did that. As I said, a simple loop to read from any of the 8255 ports seems to work OK. But, I can't see any output at any of the ports using a simple output loop. And, yes, I initialized the 8255 for input or output before running these loops.

Post by John Monahan
By now there are well over 100 of these boards out there. It must be some glitch in your
system

That's what I can't understand -- my backplane (CompuPro) works fine with lots of legacy CPU's/FDCs/etc. N8VEM serial card works great in the backplane. I'm giving up on the CF cards for now ... can't spend any more time on this.

Roger

[John Monahan]

Roger, before you give up let me take another try. I need to know in detail however your setup



What Z80 board, what S100Computers boards. What Phi, clock speed.

Can you get to an absolutely minimum system Z80, RAM, Console I/O and V3 IDE.

Did you say you also have tried V1 & V2 boards, (if so that makes me suspicious you have some other board with a port(s) overlap).



You say you cannot write to the 8255. What about configuration writes? Check by setting port A or B up as simple input ports. Tie one or more pins high/low and see if you get the correct input data. Let me know answers to the above before I go further.



John











From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com]
Sent: Tuesday, July 14, 2015 7:09 PM
To: n8vem-***@googlegroups.com
Subject: Re: [N8VEM-S100:7405] Re: V3 Dual IDE/CF S100 Bus board initial checks



Hi John,

Post by John Monahan
Those IDE boards are in fact a very simple boards.

I agree! On paper, at least. But all the chatter I've seen here w.r.t. the flavor of 8255, mods. to the boards, and subs. for some of the standard LS logic, leads me to believe that they are not all that straightforward.

Post by John Monahan
Using a simple logic probe determine if the chip CS* lines is going low with a write.

It is.

Post by John Monahan
If WR* is going low etc.

It is. Everything looks OK (with a simple logic probe), but I can't see these signals in relationship to each other (no digital logic analyzer).

Post by John Monahan
Single step through a simple continuous write loop in RAM. Eg:-

Yep, did that. As I said, a simple loop to read from any of the 8255 ports seems to work OK. But, I can't see any output at any of the ports using a simple output loop. And, yes, I initialized the 8255 for input or output before running these loops.

Post by John Monahan
By now there are well over 100 of these boards out there. It must be some glitch in your
system

That's what I can't understand -- my backplane (CompuPro) works fine with lots of legacy CPU's/FDCs/etc. N8VEM serial card works great in the backplane. I'm giving up on the CF cards for now ... can't spend any more time on this.

Roger

[Jeff Albrecht]

Post by norwestrzh via N8VEM-S100
Hi John,

Post by John Monahan
Those IDE boards are in fact a very simple boards.

I agree! On paper, at least. But all the chatter I've seen here w.r.t.
the flavor of 8255, mods. to the boards, and subs. for some of the standard
LS logic, leads me to believe that they are not all that straightforward.

Debugging the write to the 8255 today. It struck me to check the part
number of my 8255. I have a 'P8255' I obained that part number from an
older IDE/CF BOM. The BOM for the IDE/CF v.3 specifies a '8255AC-5' is this
a deal breaker? Do I specifically need the '8255AC-5' ??

I did check U108 74LS373 has data on pins 2, 5...

[John Monahan]

Not really, if you have a slow chip/fast CPU just add wait states to the board.

John





From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com] On Behalf Of Jeff Albrecht
Sent: Wednesday, July 15, 2015 9:26 AM
To: n8vem-***@googlegroups.com
Cc: ***@aol.com
Subject: Re: [N8VEM-S100:7411] Re: V3 Dual IDE/CF S100 Bus board initial checks



On Tuesday, July 14, 2015 at 7:09:18 PM UTC-7, ***@aol.com wrote:

Hi John,

Post by John Monahan
Those IDE boards are in fact a very simple boards.

I agree! On paper, at least. But all the chatter I've seen here w.r.t. the flavor of 8255, mods. to the boards, and subs. for some of the standard LS logic, leads me to believe that they are not all that straightforward.



Debugging the write to the 8255 today. It struck me to check the part number of my 8255. I have a 'P8255' I obained that part number from an older IDE/CF BOM. The BOM for the IDE/CF v.3 specifies a '8255AC-5' is this a deal breaker? Do I specifically need the '8255AC-5' ??



I did check U108 74LS373 has data on pins 2, 5...

[norwestrzh via N8VEM-S100]

Hi Jeff,

Post by Jeff Albrecht
Which is what led me to believe the code was not Z80 specific.

It's not, and I had trouble getting any of the sources to assemble in any of the standard assemblers that I normally use with CP/M 2.2. I think that the intent was to port the code later on to the Intel processors, so it is in a form that would make that easier?? Just guessing. BUT, it leaves those of us who use CP/M 2.2 in a quandry.

I just translated it (the single CF version) as best I could, and got it running with CP/M 2.2. It seems to work OK, but it was a lot of work.

I just wish that the .HEX files had been included in the distribution. Then it would be a fairly simple matter to regenerate the code in a form that would work for whatever configuration one is using.

Roger

[norwestrzh via N8VEM-S100]

Hi John,

Post by John Monahan
Roger, before you give up let me take another try.
I need to know in detail however your setup.

OK .... it will take me a little time to re-create my attempts to get V3 working, but I can give you a little info. about what I was doing before I pulled the cards out. CompuPro backplane, with CompuPro CPU-Z80 (running at 4 MHz). The CPU-Z80 has provision for two on-board EPROMs, and I'm using (for now) two 2716s burned with a simple monitor that lets me look at memory, change memory, jump to a given address, download code, etc. I'm using a 64k static RAM card (Digital Research Computers) based on the 6116 SRAM. And there is a N8VEM serial card in there too. I believe it is configured to run at port addresses 0Axh (but I need to check that).

Post by John Monahan
Did you say you also have tried V1 & V2 boards,

Yes, believe it or not, I came closest to getting things to work with the V1 card. I got the single CF MYIDE code running, and it seems to behave normally, at least for reading the CF card. There is some kind of an issue with sector numbering (what it displays as the "first" sector is really (I think) the second sector), but as I remember it, there was a discussion about that. That MYIDE jumps the sector numbering by 1 to take care of CP/M sector numbering?

My attempts with V2 were a total bust.

Post by John Monahan
You say you cannot write to the 8255. What about configuration writes?

Well, that's interesting. I *thought* that I was sending the correct configuration codes (80h for reads and 92h for write to port A?) to the control port. BUT, what if that is not working, and the 8255 comes up in some sort of read configuration? Then I could read OK, but writes would not work. That's what I'm seeing.

Post by John Monahan
Check by setting port A or B up as simple input ports.

OK, give me some time to set this up again, and verify that's what is happening.

Roger

[John Monahan]

From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com]
Sent: Wednesday, July 15, 2015 9:36 AM
To: n8vem-***@googlegroups.com
Subject: Re: [N8VEM-S100:7411] Re: V3 Dual IDE/CF S100 Bus board initial checks



Hi John,

Post by John Monahan
Roger, before you give up let me take another try.
I need to know in detail however your setup.

OK .... it will take me a little time to re-create my attempts to get V3 working, but I can give you a little info. about what I was doing before I pulled the cards out. CompuPro backplane, with CompuPro CPU-Z80 (running at 4 MHz). The CPU-Z80 has provision for two on-board EPROMs, and I'm using (for now) two 2716s burned with a simple monitor that lets me look at memory, change memory, jump to a given address, download code, etc. I'm using a 64k static RAM card (Digital Research Computers) based on the 6116 SRAM. And there is a N8VEM serial card in there too. I believe it is configured to run at port addresses 0Axh (but I need to check that).



I seem to remember (it’s a long time ago) I actually ran the V1 board diagnostic with that CompuPro Z80 board. So it should be OK.

Post by John Monahan
Did you say you also have tried V1 & V2 boards,

Yes, believe it or not, I came closest to getting things to work with the V1 card. I got the single CF MYIDE code running, and it seems to behave normally, at least for reading the CF card. There is some kind of an issue with sector numbering (what it displays as the "first" sector is really (I think) the second sector), but as I remember it, there was a discussion about that. That MYIDE jumps the sector numbering by 1 to take care of CP/M sector numbering?

If you got the V1 to work then the problem must be in the drive select circuit. Code/timing to the 8255 is identical for both boards.

Try forcing drive A on that V2 board. Bend out pins 5 & 6 of U16. On the back jumper pin 5 to +5, pin 6 to ground.





My attempts with V2 were a total bust.

Post by John Monahan
You say you cannot write to the 8255. What about configuration writes?

Well, that's interesting. I *thought* that I was sending the correct configuration codes (80h for reads and 92h for write to port A?) to the control port. BUT, what if that is not working, and the 8255 comes up in some sort of read configuration? Then I could read OK, but writes would not work. That's what I'm seeing.

Post by John Monahan
Check by setting port A or B up as simple input ports.

OK, give me some time to set this up again, and verify that's what is happening.



Need to know what you got here.



As a longshot see the bug report on the S100Computers page for modifying the GAL 1. Try that.





Roger

[norwestrzh via N8VEM-S100]

More info.


Configuration is as I said: CompuPro CPU-Z80 @ 4 MHz, Digital Research Computers 64k static RAM, N8VEM serial card (port addresses @ 0Axh), and of course, the V3 card.

Send 92h to control port (33h), and I can read bits on port B and they make sense (i.e. correct bit positions - put +5 on B3 and read 08h, put +5 on B2,B3 and read 0Ch, etc., etc.). BUT, if I send 80h to port 33h, and then output 55h to port B, *ALL* port B pins show nothing. My logic probe doesn't even show them as "high" or "low". They don't register at all (almost seems that they are tri-stated?). I've tried other ports on the 8255 with the same result. I swapped 8255s and see the same result.

Another curious thing is that there is activity on all RD*,WR*,and CS* of the 8255 while trying to output to port B. That shouldn't be, right? Shouldn't WR* and CS* be active, and RD* high? I can trace all three signals back to the GAL(2) ... pins 15,16, and 23 (if I remember correctly) show the same activity (all pulsing). Even when *ALL* I/O to the 8255 is stopped, RD* shows activity at the 8255 and the GAL(2) (but WR* and CS* are both high).

Any clues in there?

Roger

[John Monahan]

From: n8vem-***@googlegroups.com [mailto:n8vem-***@googlegroups.com]
Sent: Wednesday, July 15, 2015 11:29 AM
To: n8vem-***@googlegroups.com
Subject: Re: [N8VEM-S100:7414] Re: V3 Dual IDE/CF S100 Bus board initial checks



More info.



Configuration is as I said: CompuPro CPU-Z80 @ 4 MHz, Digital Research Computers 64k static RAM, N8VEM serial card (port addresses @ 0Axh), and of course, the V3 card.

Send 92h to control port (33h), and I can read bits on port B and they make sense (i.e. correct bit positions - put +5 on B3 and read 08h, put +5 on B2,B3 and read 0Ch, etc., etc.). BUT, if I send 80h to port 33h, and then output 55h to port B, *ALL* port B pins show nothing. My logic probe doesn't even show them as "high" or "low". They don't register at all (almost seems that they are tri-stated?). I've tried other ports on the 8255 with the same result. I swapped 8255s and see the same result.
Roger are you sure you are sending the right configuration codes to the 8255. I don’t want to have to spend time going back and digging into that to find the bits are wrong. How familiar are you with the 8255?


Another curious thing is that there is activity on all RD*,WR*,and CS* of the 8255 while trying to output to port B. That shouldn't be, right? Shouldn't WR* and CS* be active, and RD* high? I can trace all three signals back to the GAL(2) ... pins 15,16, and 23 (if I remember correctly) show the same activity (all pulsing). Even when *ALL* I/O to the 8255 is stopped, RD* shows activity at the 8255 and the GAL(2) (but WR* and CS* are both high).

Absolutely incorrect! RD* & WR* are the generalized bus signals pulsing all the time. They are relevant to the 8255 ONLY when CS* is low.

Roger don’t take it personally, but I’m beginning to feel you are out of your depth hardware wise. Do you want just send the darn board to me and I will check it out.

If so send personal e-mail.

John





Any clues in there?

Roger

[norwestrzh via N8VEM-S100]

Post by John Monahan
Roger are you sure you are sending the right configuration codes to the 8255. I don’t want to have to spend
time going back and digging into that to find the bits are wrong.

Not much digging required -- lines 44 and 45 of the MYIDE code. 80h sets all ports to output, and 92h sets port C to output, and ports A&B to input.

Post by John Monahan
How familiar are you with the 8255?

Not very. If I have to do parallel, I prefer the Zilog PIO.

Post by John Monahan
Absolutely incorrect! RD* & WR* are the generalized bus signals pulsing all the time.

OK ... I looked at the GAL code, and I can see they are derived directly from the bus. My mistake!

Post by John Monahan
If so send personal e-mail.

Personal e-mail on the way.

Roger

[Jeff Albrecht]

Post by Jeff Albrecht
I'm checking in with a progress report

[...]

After weeks of other projects and a *holiday *getting in the way of my
IDE/CF v3 build I'm back at it. I decided to give the board another look
for proper components oriented correctly. I decided to open the schematic
and other files in KiCad.

I have some experience with PCB having used fritzing for a toner transfer
at home, and Diptrace for a small production at OSHPark. This is pretty
much my first experience with KiCad. I ran a few tutorials. It looks pretty
good.

I've installed Kicad version 'Build: (after 2015-mar-04 BZR
unknown)-product wxWidgets 3.0.2' ... 'unknown' rather a bizarre version
number to me, I don't remember where I downloaded but felt not to confident
I had the most recent stable version. Although looking at some of the files
in the IDE/CF .zip they have similar version naming.

I downloaded
http://s100computers.com/My%20System%20Pages/IDE%20Board/IDE%20Final%20V3%20KiCAD%20Files.zip

When I opened the s100_IDE.pro I received the following notices: The
following libraries were not found: And other notices about how footprints
are setup.

C:\Users\John Monahan\Documents\S100\PC Boards\IDE Board\V3.0 Board\D24V25F5
dips-s

N8VEM-KiCAD

o_intel

o_memory

I wanted to check the value of resistors. I opened the s100_IDE.brd file.
It looks to be a version prior to the board I purchased. On the silk screen
of the .brd file I read John Monahan (9 Feb 2015). My physical board has
(28 May 2015)

The date on the .sch file matches the .pdf on the IDE/CF page.

Is a matching .brd file available for the 28 May 2015 boards?
Looks like I don't need the 'missing' libraries to open the .brd file but
are they available? Or hidden in the differences between my KiCad version
and the one used to produce the board?

- jeffa KF7CRU @jhalbrecht / @TheRetroWagon